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Freescale Semiconductor /MK61F15WS /USBHS /HCCPARAMS

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Interpret as HCCPARAMS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADC)ADC 0 (PFL)PFL 0 (0)ASP 0RESERVED 0 (0)IST0 (0)EECP0RESERVED

ASP=0, EECP=0, IST=0

Description

Host Controller Capability Parameters Register

Fields

ADC

64-bit addressing capability.
PFL

Programmable Frame List flag
ASP

Asynchronous Schedule Park capability

0 (0): Park not supported.

1 (1): Park supported.
RESERVED

Reserved
IST

Isochronous Scheduling Threshold

0 (0): The value of the least significant 3 bits indicates the number of microframes a host controller can hold a set of isochronous data structures (one or more) before flushing the state
EECP

EHCI Extended Capabilities Pointer

0 (0): No extended capabilities are implemented
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data